Re-imagining Verification - Verification Engineer 2.0

Re-imagining Verification - Verification Engineer 2.0

Verification Challenges

The tremendous advances in Integrated Circuit (IC) Design has brought us amazing products over the last decade. These products have permeated into our daily lives in more ways than we had ever imagined and now are an integral part of our day.  The advances in IC's have also increased the complexity of Design Verification (DV) significantly. Design Verification, the process of verifying that an IC functions as intended, takes up more than 50% of the time and cost of designing an IC*.

Costs of DV is increasing, and, the time-to-market for new IC projects are slipping due to DV. To meet the growing demand for IC's we need to find innovative ways to speed up verification and reduce the associated costs. Additionally, as the research highlights, DV requires a significant amount of engineering talent and, the demand for DV Engineers grew at a 6.8% CAGR*.

Source: *2020 Wilson Research Group Functional Verification Study - Harry Foster, Siemens EDA

There are not enough DV engineers being produced to meet this demand

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There is an unprecedented amount of Software and Hardware being created today. In addition, an increasing amount of decisions in our daily lives are being made by Software, Hardware and ML models. And in the future, many primary decisions in our daily lives will be made by Software, Hardware and ML Models. Therefore it is essential that these systems (Software, Hardware and ML Models) work reliably, safely and predictably.

The ubiquity and presence of Software , Hardware and ML models in our daily lives poses an enormous challenge for us to make these systems safe, reliable and predictable.

Demand for Software and Software Verification Engineers — 2020-2030

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There is a much higher demand on the software side of the equation. There are approximately 24 million software developers in the world as of 2021. This community is slated to double in the next 10 years, as software development jobs are growing at a significantly larger rate than other professions. The projected employment growth for software related jobs between 2020 and 2030 is 22%, while all other occupations are around 8% or below.

Software 2.0

As the demand and complexity of hardware continues to increase, the skill set of the DV engineer will need to change to address this demand and complexity. In the past we have relied on EDA companies to help, by improving their tool or inventing new techniques and so on. The reality is that there has not been any significant breakthroughs in verification over the past decade.

The advancements in Machine Learning (ML) and AI present significant opportunities to bring about rapid innovation in the field of Verification.

The term ‘Software 2.0’, coined by Andrej Karpathy (an AI Researcher at Tesla) has gained significant notoriety. Software 2.0 refers to a paradigm shift from traditional algorithmic and rule based software. Software 2.0 refers to a more abstract , human unfriendly way to write software, in terms of weights of the Neural Network (training a neural network).

In addition, in Software 2.0, we describe intent as a goal to the neural network, such as ‘Maximize Coverage’ or ‘Achieve 99% coverage’. The proliferation and adoption of ML is showing that Software 2.0 will become a large portion of the entire software stack.

Many hard algorithmic problems, including NP problems, that could only be solved by complex C++ code and heuristics, written by experts, can now be modeled by Neural Networks.

The power of Deep Neural Networks (DNN) is their ability to approximate almost any function, by associating input data with outputs. With this powerful capability, we can create models that mimic complex algorithms. For instance, in the field of computer vision (CV), Deep Neural Networks have almost completely replaced traditional computer vision algorithms.

Armed with advances in Machine Learning and the Software 2.0 paradigm, the verification engineer will evolve into the DV Engineer 2.0.

DV Engineer 2.0

To address the future challenges of Software and Hardware Verification , the current DV Engineer will reinvent themselves and evolve into the DV Engineer 2.0. To foster innovation the DV Engineer 2.0 will be a super version of their current self. The DV Engineer 2.0 will be highly skilled not only in their domain, but also in Machine Learning.

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With the advent of Machine Learning techniques, there have been multiple instances of Machine Learning engineers doing better than Domain Experts on hard problems. For instance, Machine Engineers from Google Deep Mind (AlphaGO) beat the world GO champion Lee Sedol . This was an unprecedented achievement for ML Engineers, with little domain knowledge of the game GO.

Another stunning example of ML engineers doing better than Domain Experts is in the field of protein folding, where Google Deep Mind (Alpha Fold), a ML program predicted protein structures better than any domain expert.

Yet another example of ML engineers doing better than Domain Experts is in the area of Chip Floorplanning on an IC. A recently published paper in nature by Google researchers, demonstrates how a ML model did better than Domain experts.

It is rather unusual that all these achievements mentioned of ML engineers doing better than domain experts, come from one company, namely Google!

There are a growing number of examples of Domain Experts who are using Machine Learning to do better in their domains. For instance, researchers at Univ of Washington developed a ML model that does as good or better than Google Deep Mind (Alpha Fold).

Another example of Domain Experts doing better with ML: Researchers at the Center for Computational Imaging and Personalized Diagnostics at Case Western Reserve University have showed that the inclusion of hand-crafted features derived from deep understanding of the problem domain in conjunction with a ML model, significantly outperform more traditional approaches for lung cancer classification on CT scans and also for predicting cancer outcomes from digital pathology images.

Challenging fields such as Hardware and Software Verification will require domain experts to embrace Machine Learning techniques and for Machine Learning engineers to attack Verification problems from a vastly different perspective.

DV Engineer 2.0 is a metaphor for Domain Experts who use Machine Learning to do better in their domains, and vice-versa, where Machine Learning Engineers do better than domain experts in their domains.

Machine Learning and Software 2.0 will play an oversized role in helping the DV Engineer 2.0 to take on the challenge of reducing the cost and time of verification, while challenging the traditional Software 1.0 stack.